Overcoming DRAM scaling limitations by employing straight recessed channel array transistors with <100> uni-axial and [100] uni-plane channels

Author

Kim, I.-G. ; Park, Joosung ; Yoon, J.-S. ; Kim, D.-J. ; Noh, J.-Y. ; Lee, J.-H. ; Kim, Y.-S. ; Hwang, M.-W. ; Yang, K.-H. ; Joosung Park ; Oh, Kyungseok

Author_Institution

DRAM Process Archit., Samsung Electron., Gyeonggi-Do

fYear

2005

fDate

5-5 Dec. 2005

Firstpage

319

Lastpage

322

Abstract

Recessed channel array transistors (RCAT) for DRAM are implemented with <100> uni-axial and {100} uni-plane channels for the first time. It is found that this structure improves the cell transistor drivability by 25% with the improvement being more effective in straight shape active RCAT than the diagonal shape active RCAT due to the larger dimension of the horizontal <100> axial channel in the {100} plane. Enhanced RCAT drivability improves tRDL (allowed time interval between data-in and word-line precharge) and retention time, which allows for lowering the gate voltage over-drive (VPP) in DRAM operation. This possibility provides a breakthrough in reliability limitations and leads to better performance in nano-scaled DRAM

Keywords

DRAM chips; nanoelectronics; DRAM scaling; cell transistor drivability; nanoscaled DRAM; recessed channel array transistors; uni-axial channel; uni-plane channels; voltage over-drive; Crystallography; Degradation; Electron mobility; Electronic mail; MOSFET circuits; Manufacturing; Random access memory; Shape; Transistors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International

Conference_Location

Washington, DC

Print_ISBN

0-7803-9268-X

Type

conf

DOI

10.1109/IEDM.2005.1609339

Filename

1609339