Self-checking and fault tolerant approaches can help BIST fault coverage: a case study

Author

Corno, Fulvio ; Prinetto, Paolo ; Reorda, Matteo Sonza

Author_Institution

Dipartimento di Autom. e Inf., Politecnico di Torino, Italy

fYear

1996

fDate

11-14 Mar 1996

Firstpage

610

Abstract

Summary form only given. We describe the design of an FIFO component with BIST capabilities. The component is now being used in the Italtel standard library and is exploited in several industrial designs. Our main contribution is to show how the effectiveness of complex BIST design can be improved, and brought to acceptable fault coverage levels, through the coupling with more advanced test architectures developed for online testing schemes. We adopted fault tolerant schemes and self-checking components to ensure that critical circuitry is working correctly

Keywords

automatic testing; built-in self test; fault tolerant computing; integrated circuit testing; integrated memory circuits; random-access storage; BIST fault coverage; FIFO component; Italtel standard library; complex BIST design; fault tolerant schemes; online testing schemes; self-checking components; test architectures; Access protocols; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Computer aided software engineering; Fault tolerance; Libraries; Logic testing; Read-write memory;

fLanguage

English

Publisher

ieee

Conference_Titel

European Design and Test Conference, 1996. ED&TC 96. Proceedings

Conference_Location

Paris

ISSN

1066-1409

Print_ISBN

0-8186-7424-5

Type

conf

DOI

10.1109/EDTC.1996.494374

Filename

494374