• DocumentCode
    3442524
  • Title

    A low on-resistance high voltage soi ligbt with oxide trench in drift region and hole bypass gate configuration

  • Author

    Lu, David Hongfei ; Jimbo, Shinichi ; Fujishima, Naoto

  • Author_Institution
    Fuji Electr. Adv. Technol. Co. Ltd., Nagano
  • fYear
    2005
  • fDate
    5-5 Dec. 2005
  • Firstpage
    381
  • Lastpage
    384
  • Abstract
    This work reports a SOI LIGBT with hole-bypassing gate configuration and oxide trench in drift region that reduces the device pitch to approximately the half of the conventional LIGBTs. The device shows a specific on-resistance of 330 mOmegamiddotmm2 that reaches the silicon-limit at 200V breakdown voltage, at an effective gate drive of 4.0V and a current density of 1000A/cm2 . The proposed device can drastically improve the cost-performance of PDP scan driver ICs by replacing the conventional LIGBTs
  • Keywords
    insulated gate bipolar transistors; plasma displays; silicon-on-insulator; 200 V; 4.0 V; PDP scan driver IC; SOI LIGBT; device pitch; hole bypassing gate configuration; oxide trench; Breakdown voltage; Current density; Dielectric devices; Driver circuits; Electric breakdown; Flat panel displays; Insulation; Low voltage; Plasma displays; Silicon on insulator technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
  • Conference_Location
    Washington, DC
  • Print_ISBN
    0-7803-9268-X
  • Type

    conf

  • DOI
    10.1109/IEDM.2005.1609356
  • Filename
    1609356
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3442524