• DocumentCode
    3443005
  • Title

    The micro to nano addressing block (MNAB)

  • Author

    Gopalakrishnan, K. ; Shenoy, R.S. ; Rettner, C.T. ; King, R.S. ; Zhang, Y. ; Kurdi, B. ; Bozano, L.D. ; Welser, J.J. ; Rothwell, M.E. ; Jurich, M. ; Sanchez, M.I. ; Hernandez, M. ; Rice, P.M. ; Risk, W.P. ; Wickramasinghe, H.K.

  • Author_Institution
    Almaden Res. Center, IBM, San Jose, CA
  • fYear
    2005
  • fDate
    5-5 Dec. 2005
  • Firstpage
    471
  • Lastpage
    474
  • Abstract
    Over the past few years, a number of techniques, including self-assembly, nanoimprint lithography and spacer-based frequency doubling, have been explored to pattern line and space structures that are considerably denser than possible with conventional photolithography, with excellent critical dimension control. In order to build useful circuits with them, an efficient way of interfacing these nanoscale lines with the photolithographically defined peripheral circuits is needed. While many solutions to this problem have been proposed, for the first time, we report a solution (MNAB) that is (a) fully silicon-process compatible, (b) non-stochastic (i.e. is completely deterministic,) and (c) does not require any critical alignment. The MNAB uses discrete analog potentials to deplete and switch off certain nanoscale lines enabling selection of the remaining nanoscale line. Simulation results show that individual nanoscale silicon lines can be addressed with selectivities (ratio of current in conducting line to that in depleted lines) exceeding 100times at features as small as 10 nm using this concept. Experimental results on various silicon prototypes show that selectivities exceeding 100times can be easily obtained even on sub-20 nm features
  • Keywords
    nanolithography; nanopatterning; MNAB; analog potential; line pattern; micro to nano addressing block; nanoscale lines; nanoscale silicon lines; photolithography; silicon-process compatible; space structures pattern; Circuits; Doping; Frequency; Lithography; Nanolithography; Nanowires; Prototypes; Self-assembly; Silicon; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
  • Conference_Location
    Washington, DC
  • Print_ISBN
    0-7803-9268-X
  • Type

    conf

  • DOI
    10.1109/IEDM.2005.1609382
  • Filename
    1609382