An efficient algorithm for deriving logic functions of asynchronous circuits

Author

Miyamoto, Toshiyuki ; Kumagai, Sadatoshi

Author_Institution

Dept. of Electr. Eng., Osaka Univ., Japan

fYear

1996

fDate

18-21 Mar 1996

Firstpage

30

Lastpage

35

Abstract

Signal Transition Graphs (STGs) are Petri nets, which were introduced to represent a behavior of asynchronous circuits. To derive logic functions from an STG, the reachability graph should be constructed. In the verification of STGs some method based on Occurrence nets (OCN) and its prefix, called unfolding, has been proposed. OCNs can represent both causality and concurrency between two nodes by net structure. In this paper, we propose a method to derive a logic function by generating substate space of a given STG using the structural properties of OCN. The proposed method can be seen as a parallel algorithm for deriving a logic function

Keywords

Petri nets; asynchronous circuits; logic CAD; logic design; Occurrence nets; Petri nets; Signal Transition Graphs; asynchronous circuits; logic functions; parallel algorithm; reachability graph; substate space; unfolding; Asynchronous circuits; Circuit synthesis; Concurrent computing; Explosions; Logic functions; Parallel algorithms; Polynomials; Signal synthesis;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Research in Asynchronous Circuits and Systems, 1996. Proceedings., Second International Symposium on

Conference_Location

Fukushima

Print_ISBN

0-8186-7298-6

Type

conf

DOI

10.1109/ASYNC.1996.494435

Filename

494435