Title :
A dual-mode digital DC-DC converter based on distributed arithmetic
Author :
Foong, Huey Chian ; Tan, Meng Tong ; Zheng, Yuanjin
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore, Singapore
Abstract :
This paper presents the design of an area-efficient and reconfigurable dual-mode (PWM/PFM) digital DC-DC controller based on distributed arithmetic. The proposed digital DC-DC controller is realized in current-mode topology to achieve better line regulation. It also features a memory-reuse concept for further area reduction and dual-mode (PFM/PWM) reconfigurability. This design is verified with measurements on a Virtex-4 FPGA board. Simulation results show that the number of FPGA slices and Look-Up Tables is reduced by 57% and 45% respectively. Power consumption based on implementation is reduced by 57.6% to 22mW. With a switching frequency of 390kHz, the measured tracking speed of the converter for a maximum load current step (0 to 500mA) is 62.5μs/V.
Keywords :
DC-DC power convertors; PWM power convertors; current-mode circuits; digital control; distributed arithmetic; field programmable gate arrays; table lookup; PFM power convertors; PWM power convertors; area reduction; current-mode topology; distributed arithmetic; dual-mode digital DC-DC converter; field programmable gate arrays; frequency 390 kHz; line regulation; look-up tables; memory-reuse concept; power 22 mW; Current measurement; DC-DC power converters; Digital arithmetic; Digital control; Distributed control; Energy consumption; Field programmable gate arrays; Pulse width modulation; Switching frequency; Topology;
Conference_Titel :
Power Electronics Electrical Drives Automation and Motion (SPEEDAM), 2010 International Symposium on
Conference_Location :
Pisa
Print_ISBN :
978-1-4244-4986-6
Electronic_ISBN :
978-1-4244-7919-1
DOI :
10.1109/SPEEDAM.2010.5542165