A novel VLSI architecture for the real-time implementation of 2-D signal processing systems

Author

Park, Seong-Mo ; Alexander, Winser E. ; Kim, Jung H. ; Batchelor, William E. ; Krakow, William T.

Author_Institution

Dept. of Electron. Comput. Eng., North Caroline State Univ., Raleigh, NC, USA

fYear

1988

fDate

3-5 Oct 1988

Firstpage

582

Lastpage

585

Abstract

The authors present a high-performance VLSI architecture for two-dimensional (2-D) digital signal processing applications. The architecture uses a specially designed digital signal processor (DSP) as a node in a multiprocessor system for real-time or near-real-time 2-D signal processing. The DSP is custom-designed and has a throughput of two multiplications and three additions in a single cycle. It has wavefront-array-processor properties and operates asynchronously in a multiprocessor system. This architecture extends the concept of using a single processor to the use of a multiprocessor system

Keywords

VLSI; computerised signal processing; real-time systems; 2-D signal processing systems; VLSI architecture; digital signal processor; multiprocessor system; real-time implementation; wavefront-array-processor properties; Computer architecture; Difference equations; Digital signal processing; Digital signal processing chips; Finite difference methods; Multiprocessing systems; Real time systems; Signal processing; Signal processing algorithms; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Design: VLSI in Computers and Processors, 1988. ICCD '88., Proceedings of the 1988 IEEE International Conference on

Conference_Location

Rye Brook, NY

Print_ISBN

0-8186-0872-2

Type

conf

DOI

10.1109/ICCD.1988.25767

Filename

25767