DocumentCode :
3443896
Title :
An easily integrable NiSi TOSI-gate/SiON-module for LP SRAM applications based on a single step silicidation of gate and junction
Author :
Müller, M. ; Mondot, A. ; Gierczynski, N. ; Aimé, D. ; Froment, B. ; Leverd, F. ; Gouraud, P. ; Talbot, A. ; Descombes, S. ; Morand, Y. ; Le Tiec, Y. ; Besson, P. ; Toffoli, A. ; Ribes, G. ; Roux, J.-M. ; Pokrant, S. ; André, F. ; Skotnicki, T.
Author_Institution :
Philips Semicond., Crolles
fYear :
2005
fDate :
5-5 Dec. 2005
Firstpage :
626
Lastpage :
629
Abstract :
In this paper, we present a CMOS NiSi totally silicided (TOSI)-gate on SiON module, based on a single step silicidation of the junctions and the total gate, and demonstrate its industrial feasibility on SRAM demonstrators. The single step silicidation is achieved by the use of an ultra-low initial Si gate electrode and selective S/D epitaxy, which allows us to avoid any additional CMP step. We show excellent transistor morphology, good device results and first functional NiSi TOSI-gate SRAMs in a state-of-the-art industrial cell size indicating the potential of our TOSI integration module for LP applications
Keywords :
CMOS memory circuits; SRAM chips; chemical mechanical polishing; nickel compounds; silicon compounds; CMOS integrated circuit; LP SRAM applications; NiSi; NiSi totally silicided gate; SRAM demonstrators; SiON; TOSI integration module; TOSI-gate-SiON-module; industrial feasibility; selective S/D epitaxy; single step silicidation; transistor morphology; ultra-low Si gate electrode; CMOS technology; Contamination; Electrodes; Epitaxial growth; Impurities; Ion implantation; Iron; Morphology; Random access memory; Silicidation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-9268-X
Type :
conf
DOI :
10.1109/IEDM.2005.1609428
Filename :
1609428
Link To Document :
بازگشت