Image processing architectures for multimedia terminals

Different architectures of video coders suitable for still and moving images and based on currently available digital integrated circuits are discussed. It is suggested that the computational performance of several hundred MOPS (million operations per second) is well within the reach of current technology if the architecture of the processing system can exploit all the characteristics of the video coding algorithm. Most of the computation has to be performed by application-specific integrated circuits controlled by digital signal processors which are well suited for the more sophisticated decision based video coding. Image partitioning and data driven control on the other hand allow the maximum exploitation of the concurrency of computation