Interface models

Any non-trivial computing system is constructed in a piecewise fashion i.e., by composing a large number of modules, each with a limited functionality, into a complete system. The piecewise construction is done partly to manage the design process, partly because some of the modules are off-the-shelf components that are reused from other designs. The interface of a module is the part of the module that is externally visible and through which the functions of the modules are invoked. A common source of errors and inefficiencies in design and development projects is misunderstandings caused by ambiguous interface descriptions. This work aims at establishing an interface model where a wide variety of different aspects of interfaces can be analyzed unambiguously, in particular the timing aspects. The notions of module and computing systems are interpreted in a general sense encompassing combinations of hardware and software and models on different levels of abstraction from simple standard cells to complex sub-systems. A module concept is present in object oriented programming languages, in specification languages like Z, and also in hardware description languages like VHDL etc. There are many syntactical variations of this module concept, but a common goal is to structure a system into manageable parts