DocumentCode :
3446502
Title :
The origin of variable retention time in DRAM
Author :
Mori, Yuki ; Ohyu, Kiyonori ; Okonogi, Kensuke ; Yamada, Ren-ichi
Author_Institution :
Central Res. Lab., Hitachi, Ltd., Tokyo
fYear :
2005
fDate :
5-5 Dec. 2005
Firstpage :
1034
Lastpage :
1037
Abstract :
To investigate the origin of DRAM variable retention time (VRT), we use test structures and carefully measure the time dependence of leakage current in DRAM. Consequently we find for the first time that the junction leakage current fluctuates just like random telegraph signal. We analyze the leakage current fluctuation in detail and find it the origin of VRT
Keywords :
DRAM chips; leakage currents; DRAM; VRT; junction leakage current; random telegraph signal; variable retention time; Circuit testing; Current measurement; Fluctuations; Laboratories; Leakage current; Random access memory; Subthreshold current; Telegraphy; Temperature dependence; Time measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-9268-X
Type :
conf
DOI :
10.1109/IEDM.2005.1609541
Filename :
1609541
Link To Document :
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