Design for ASIC reliability for low-temperature applications

Author

Chen, Yuan ; Mojaradi, Mohammad ; Westergard, Lynett ; Billman, Curtis ; Cozy, Scott ; Burke, Gary ; Kolawa, Elizabeth

Author_Institution

Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA

fYear

2005

fDate

17-20 Oct. 2005

Abstract

A methodology for designing reliability into electronics for low-temperature applications has been developed. The proposed hot carrier aging lifetime projection model takes account of the evaluation of the hot carrier aging impact on the technology, analysis of circuit critical paths, transistor substrate current profile and temperature profile to determine the most applicable transistor size in order to meet reliability requirements. This methodology can be applied to other transistor-level failure and/or degradation mechanisms for applications with a varying temperature ranges.

Keywords

ageing; application specific integrated circuits; cryogenic electronics; failure analysis; hot carriers; integrated circuit design; integrated circuit reliability; ASIC reliability; circuit critical paths; degradation mechanisms; hot carrier aging lifetime projection model; low-temperature applications; temperature profile; transistor size; transistor substrate current profile; transistor-level failure; Aging; Application specific integrated circuits; Degradation; Design methodology; Hot carriers; Integrated circuit reliability; MOS devices; Substrates; Temperature dependence; Temperature distribution;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Reliability Workshop Final Report, 2005 IEEE International

Print_ISBN

0-7803-8992-1

Type

conf

DOI

10.1109/IRWS.2005.1609561

Filename

1609561