Validation of Frequency- and Time-domain Fidelity of an Ultra-low Latency Hardware-in-the-Loop (HIL) Emulator

This paper presents frequency- and time-domain validation of an ultra-low latency real-time hardware-in-the-loop (HIL) emulator. We investigate the frequency domain fidelity of the small-signal transfer functions, the input impedance, and the output impedance of a buck converter emulated on HIL. We show that the frequency response of the hardware-in-the-loop emulation closely matches the analytical results for input impedance, output impedance, line-to-output, and control-to-output transfer functions. Additionally, we present time domain comparisons between the real-time emulation and a reference hardware design under steady state and transient conditions. Our results demonstrate the ultra-high fidelity of the hardware-in-the-loop emulator and also present its capability as a design optimization and verification tool for advanced power electronics controller development.