DocumentCode
3448862
Title
An efficient ILP-based scheduling algorithm for control-dominated VHDL descriptions
Author
Münch, Michael ; Wehn, Norbert ; Glesner, Manfred
Author_Institution
Inst. of Microelectron. Syst., Tech. Univ. Darmstadt, Germany
fYear
1996
fDate
6-8 Nov 1996
Firstpage
45
Lastpage
50
Abstract
In this paper we present for the first time a mathematical framework for solving a special instance of the scheduling problem in control-flow dominated behavioral VHDL descriptions given that the timing of I/O signals has been completely or partially specified. It is based on a code-transformational approach which fully preserves the VHDL semantics. The scheduling problem is mapped onto an integer linear program (ILP) which can be constrained to be solvable in polynomial time, but still permits optimizing the statement sequence across basic block boundaries
Keywords
computational complexity; hardware description languages; integer programming; logic CAD; logic programming; processor scheduling; I/O signals; ILP-based scheduling algorithm; VHDL semantics; block boundaries; code-transformational approach; control-dominated VHDL descriptions; control-flow dominated behavioral VHDL descriptions; integer linear program; mathematical framework; polynomial time; scheduling problem; statement sequence; Constraint optimization; Control systems; Digital signal processing; Logic design; Microelectronics; Polynomials; Processor scheduling; Protocols; Scheduling algorithm; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
System Synthesis, 1996. Proceedings., 9th International Symposium on
Conference_Location
La Jolla, CA
ISSN
1080-1820
Print_ISBN
0-8186-7563-2
Type
conf
DOI
10.1109/ISSS.1996.565876
Filename
565876
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