Title :
Self-checking circuits
Author :
Kakaroudas, A.P. ; Papndomanolakis, K. ; Karaolis, E. ; Nikolaidis, S. ; Alachiotis, N. ; Goutis, C.E.
Author_Institution :
Dept. of Electr. Eng. & Comput. Eng., Patras Univ., Greece
Abstract :
The hardware and power requirements of self-checking architectures for common data path and data storage circuits are examined in this paper. The output of these circuits is encoded according to the parity code and the CRC. Standard cell technology is used and the detection of any single stuck-at fault, permanent or transient, is ensured for all the proposed circuits while the effectiveness of each coding scheme in the detection of double and triple faults is also determined. As observed by the results, the hardware and power requirements as well as the effectiveness in fault detection are strongly dependent on the selected coding scheme
Keywords :
VLSI; built-in self test; cellular arrays; fault diagnosis; integrated circuit testing; logic testing; low-power electronics; CRC; coding scheme; common data path; data storage circuits; double faults; fault detection; parity code; self-checking architectures; standard cell technology; triple faults; Biomedical equipment; Circuit faults; Computer architecture; Cyclic redundancy check; Electrical fault detection; Fault detection; Hardware; Power engineering computing; Software safety; Very large scale integration;
Conference_Titel :
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
Conference_Location :
Pafos
Print_ISBN :
0-7803-5682-9
DOI :
10.1109/ICECS.1999.814492
