Implementation of an Arm Compatible Processor Core for SOC Designs

Author

Morgan, Ahmed A. ; Allam, Mahmoud E. ; Salama, May A. ; Mansour, Hala A K

Author_Institution

Fac. of Eng., Benha Univ.

fYear

2005

fDate

5-6 Dec. 2005

Firstpage

851

Lastpage

859

Abstract

Hardware description languages (HDLs) are commonly used to construct hardware systems. Reuse of the design is a common practice to improve the productivity nowadays. In this paper, an implementation of a fully pipelined ARM compatible processor core, which can be embedded into system-on-chips (SOCs) is presented. The implementation aims to support research, education, and development by opening the source codes. The logic description of the core is based on VHDL. Therefore, the core can be applied to design tools of many vendors and can be easily reused

Keywords

hardware description languages; logic design; microprocessor chips; system-on-chip; ARM compatible processor core; SOC designs; VHDL; hardware description languages; system-on-chips; Computer architecture; Design methodology; Educational products; Field programmable gate arrays; Hardware design languages; Intellectual property; Process design; Productivity; Programmable logic arrays; System-on-a-chip; ARM core; IP core-based SOC design; Top-down design;

fLanguage

English

Publisher

ieee

Conference_Titel

Information and Communications Technology, 2005. Enabling Technologies for the New Knowledge Society: ITI 3rd International Conference on

Conference_Location

Cairo

Print_ISBN

0-7803-9270-1

Type

conf

DOI

10.1109/ITICT.2005.1609671

Filename

1609671