Title :
Synthesis and analysis of high-order cascaded continuous-time ΣΔ modulators
Author :
Lin, Chi-Hung ; Ismail, Mohammed
Author_Institution :
Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA
Abstract :
In this paper, synthesis and analysis of high-order cascaded continuous-time ΣΔ modulator have been explored. A simple mixed-mode methodology is used to synthesize the cascade continuous-time ΣΔ modulator. Mixed-mode simulation is performed by MATLAB. A 3rd-order 2-1 cascaded case is demonstrated, also the nonlinearities of high order continuous-time cascaded ΣΔ modulator are analyzed, such as clock jitter and loop delay
Keywords :
cascade networks; circuit CAD; circuit simulation; continuous time systems; jitter; mixed analogue-digital integrated circuits; modulators; sigma-delta modulation; ADC; MATLAB; cascaded sigma-delta modulators; clock jitter; continuous-time ΣΔ modulators; high-order ΣΔ modulators; loop delay; mixed-mode methodology; mixed-mode simulation; nonlinearities; Circuit synthesis; Clocks; Convolution; Delta modulation; Electronic mail; Energy consumption; Integrated circuit synthesis; MATLAB; Signal synthesis; Very large scale integration;
Conference_Titel :
Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on
Conference_Location :
Pafos
Print_ISBN :
0-7803-5682-9
DOI :
10.1109/ICECS.1999.814501
