Two-step quantization in multibit ΔΣ-modulators

An architecture to simplify the circuit implementation of the internal A/D-converter in a ΔΣ-modulator is proposed. The architecture is based on dividing the A/D-conversion into two time-steps, which makes the internal quantization feasible with much higher resolution than with conventional solutions. Furthermore, the time-steps are interleaved so that the resolution improvement is achieved without sacrificing the speed. It is shown, with a linearized model, that the order of the noise shaping is increased by one with respect to the coarse quantization error made during the first step. It is important to pay attention to the partitioning of the bits between different stages or the coarse error may dominate the dynamic range. For a high oversampling ratio the coarse quantization error made in the first step is easily suppressed to an insignificant level due to the one order higher noise shaping