Balancing DC link using the redundant states method in selective harmonics elimination PWM

A method is presented to balance the two DC-link capacitor voltages for a three-level inverter. Previous work has shown that using the redundant states in space-vector PWM algorithm solves this problem, leaving lower order harmonics or using high switching frequency. Here, it is shown that, the redundant states can be used in selective harmonics elimination PWM in the case of multilevel inverters, so as to produce the required fundamental voltage and to balance the two DC-link voltage sources without an additional circuitry.