Multi-objective layout optimization for Multi-Chip Power Modules considering electrical parasitics and thermal performance

Multi-Chip Power Modules (MCPMs) allow for integration of high power semiconductor devices and control circuitry into one compact package which yields improved reliability and reduced size, cost, and complexity. The layout design process of an MCPM is time consuming and very multidisciplinary, spanning thermal, electrical, and mechanical issues. A software tool is introduced in this paper which allows for a user to draw a `stick figure´ of a desired MCPM layout which is transformed into a multi-objective optimization problem by the tool. After optimization, a user can browse a set of results which form a trade-off curve of approximately Pareto optimal thermal and electrical parasitic layout performance.