Timing measurements of synchronization circuits

Author

Semiat, Yaron ; Ginosar, Ran

Author_Institution

VLSI Syst. Res. Center, Technion-Israel Inst. of Technol., Haifa, Israel

fYear

2003

fDate

12-15 May 2003

Firstpage

68

Lastpage

77

Abstract

A regular (two-flop) synchronizer and six multi-synchronous synchronizers are implemented on a programmable logic device and are measured. An experimental system and method for measuring synchronizers and metastable flip-flops are described. Two separate settling time constants are shown for a metastable flop, confirming earlier results of Dike and Burton [1999]. Clocking cross-talk between asynchronous clocks is demonstrated. The regular synchronizer is useful for communications between asynchronous clock domains, while the other synchronizers can provide higher bandwidth communications between multi-synchronous and mesochronous domains.

Keywords

VLSI; crosstalk; flip-flops; integrated circuit measurement; programmable logic devices; synchronisation; clocking cross-talk; higher bandwidth communications; metastable flip-flops; multisynchronous synchronizers; programmable logic device; settling time constants; synchronization circuits; Bandwidth; Circuits; Clocks; Flip-flops; Frequency synchronization; Levee; Metastasis; Programmable logic devices; Timing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Asynchronous Circuits and Systems, 2003. Proceedings. Ninth International Symposium on

ISSN

1522-8681

Print_ISBN

0-7695-1898-2

Type

conf

DOI

10.1109/ASYNC.2003.1199167

Filename

1199167