The use of a virtual instruction set for the software synthesis of Hw/Sw embedded systems

The application range of embedded computing is going to cover the majority of market products spanning from consumer electronic, automotive, telecom and process control. For such applications, typically there is strong cooperation between dedicated hardware modules and software systems. An important issue toward a fully automated system-level implementation is represented by the software development process. The basic requirements are: accurate timing characterization to be used during the early stages of the design to compare alternative architectures and reliable synthesis techniques to ensure the respect of the correct functionality by avoiding, as much as possible, the direct designer´s intervention during the development process. This paper describes a novel methodology to address the needs of concurrently synthesizing the software component of a control-dominated hardware-software system, possibly under real-time constraints. An intermediate model (Virtual Instruction Set) for the software is presented, suitable for both for synthesis and analysis purposes. The overall system synthesis is presented with particular emphasis on the problem of low level performance estimation, static scheduling of the software process and retargetable code synthesis