Improving the gate oxide integrity of very high voltage MCT and IGBT devices by external gettering of metal impurities

Author

Herr, E. ; Baltes, H. ; Thiemann, U. ; Stockmeier, T.

Author_Institution

Phys. Electron. Lab., Eidgenossische Tech. Hochschule, Zurich, Switzerland

fYear

1994

fDate

31 May-3 Jun 1994

Firstpage

213

Lastpage

218

Abstract

We observed that gate oxides of MCT and IGBT devices exhibited lower breakdown field strengths when the devices were fabricated on float-zone (FZ) instead of Czochralski-grown (CZ) silicon starting material. This is because of the different precipitation behavior of heavy metal contaminants. Using neutron activation analysis (NAA), we determined Fe and Ni concentration levels that weaken the gate oxides of BiMOS devices on FZ silicon. We compared the effect of various external gettering techniques on the gate oxide integrity. External gettering by polysilicon layers and by argon implantation damage were employed on the wafer back to improve the gate oxide integrity of BiMOS devices fabricated on FZ material

Keywords

insulated gate bipolar transistors; BiMOS devices; IGBT devices; MCT devices; Si; breakdown field strengths; external gettering; float-zone material; gate oxide integrity; implantation damage; metal impurities; neutron activation analysis; polysilicon layers; precipitation behavior; very high voltage devices; wafer back; Activation analysis; Argon; Breakdown voltage; Gettering; Insulated gate bipolar transistors; Iron; MOSFETs; Neutrons; Silicon; Thyristors;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Semiconductor Devices and ICs, 1994. ISPSD '94., Proceedings of the 6th International Symposium on

Conference_Location

Davos

ISSN

1063-6854

Print_ISBN

0-7803-1494-8

Type

conf

DOI

10.1109/ISPSD.1994.583725

Filename

583725