Title :
A reusable inner product unit for DSP applications
Author :
Sacristan, M.A. ; Rodellar, V. ; Diaz, A. ; Garcia, V. ; Gomez, P.
Author_Institution :
Fac. de Inf., Univ. Politecnica de Madrid, Spain
Abstract :
In this paper a two´s complement parameterized multiplier/inner-product unit cell is presented. It can be used as a library element when a methodology for Design with Reusability (DwR) is applied. The multiplicand and multiplier operands can be of any size. The cell code is written as VHDL suited for the Synopsys high-level synthesis tool
Keywords :
digital signal processing chips; hardware description languages; high level synthesis; Synopsys high-level synthesis tool; VHDL; cell code; design with reusability; library element; multiplicand; multiplier operands; reusable inner product unit; two´s complement parameterized multiplier/inner-product unit; Algorithm design and analysis; Arithmetic; Circuit synthesis; Decision support systems; Digital signal processing; High level synthesis; Libraries; Read only memory; Signal generators; Signal processing algorithms;
Conference_Titel :
EUROMICRO Conference, 1999. Proceedings. 25th
Conference_Location :
Milan
Print_ISBN :
0-7695-0321-7
DOI :
10.1109/EURMIC.1999.794468
