DocumentCode
345114
Title
A reusable inner product unit for DSP applications
Author
Sacristan, M.A. ; Rodellar, V. ; Diaz, A. ; Garcia, V. ; Gomez, P.
Author_Institution
Fac. de Inf., Univ. Politecnica de Madrid, Spain
Volume
1
fYear
1999
fDate
1999
Firstpage
209
Abstract
In this paper a two´s complement parameterized multiplier/inner-product unit cell is presented. It can be used as a library element when a methodology for Design with Reusability (DwR) is applied. The multiplicand and multiplier operands can be of any size. The cell code is written as VHDL suited for the Synopsys high-level synthesis tool
Keywords
digital signal processing chips; hardware description languages; high level synthesis; Synopsys high-level synthesis tool; VHDL; cell code; design with reusability; library element; multiplicand; multiplier operands; reusable inner product unit; two´s complement parameterized multiplier/inner-product unit; Algorithm design and analysis; Arithmetic; Circuit synthesis; Decision support systems; Digital signal processing; High level synthesis; Libraries; Read only memory; Signal generators; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
EUROMICRO Conference, 1999. Proceedings. 25th
Conference_Location
Milan
ISSN
1089-6503
Print_ISBN
0-7695-0321-7
Type
conf
DOI
10.1109/EURMIC.1999.794468
Filename
794468
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