DocumentCode :
3452643
Title :
Parallel FPGA technology mapping using multi-core architectures
Author :
Kennings, Andrew ; Ravishankar, Channasandra
Author_Institution :
Electr. & Comput. Eng., Univ. of Waterloo, Waterloo, ON, Canada
fYear :
2011
fDate :
8-11 May 2011
Abstract :
We present a parallelization of a modern FPGA technology mapper suitable for use on a multi-core processor which exploits the inherent data parallelism of the algorithm. Our parallel mapper is deterministic regardless of the number of cores available which is important in an industrial context. Without any compromise in the quality of result, we show average speed-ups of 1.5X to 3.2X on a dual-core and quad-core multi-processor, respectively.
Keywords :
field programmable gate arrays; multiprocessing systems; data parallelism; dual-core multiprocessor; modern FPGA technology mapper; multicore architectures; multicore processor; parallel FPGA technology mapping; parallelization; quad-core multiprocessor; Design automation; Field programmable gate arrays; Instruction sets; Logic gates; Table lookup; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Computer Engineering (CCECE), 2011 24th Canadian Conference on
Conference_Location :
Niagara Falls, ON
ISSN :
0840-7789
Print_ISBN :
978-1-4244-9788-1
Electronic_ISBN :
0840-7789
Type :
conf
DOI :
10.1109/CCECE.2011.6030453
Filename :
6030453
Link To Document :
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