DocumentCode
3453107
Title
Effect of Poly-Si Gate Depletion on Tuning Range in MOS Varactors
Author
Kulkarni, Jaydeep P. ; Bhat, Navakanta
Author_Institution
ECE Department, Purdue University, West Lafayette, Indiana, USA. Phone: 765-494-9448, Email: jaydeep@purdue.edu
fYear
2006
fDate
26-28 June 2006
Firstpage
81
Lastpage
82
Keywords
CMOS process; CMOS technology; Capacitance; Diodes; Doping; Electrodes; Implants; MOS devices; Q factor; Varactors;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference, 2006 64th
Conference_Location
State College, PA, USA
ISSN
1548-3770
Print_ISBN
0-7803-9748-7
Type
conf
DOI
10.1109/DRC.2006.305128
Filename
4097545
Link To Document