An efficient architecture of multiple 8×8 transforms for H.264/AVC and VC-1 decoders

This paper proposes an efficient architecture, which can perform multiple 8×8 transforms for both H.264/AVC and VC-1 decoders. The hardware design which supports multiple standards becomes more and more important. By designing a unique data flow for VC-1 8×8 inverse transform, the H.264/AVC and VC-1 8×8 inverse transforms are realized in a hardware sharing architecture. The proposed multiple transforms architecture contains fast one-dimensional (1-D) transforms and rounding operations. Simulation results show the proposed architecture takes 6,702 gates which are much less than the individual designs for the H.264/AVC and VC-1 8×8 inverse transforms.