DocumentCode
3454666
Title
A 1 GHz flash-ADC module in VMEbus
Author
von Walter, P. ; Rausch, Albert
Author_Institution
Physikalisches Inst., Heidelberg Univ., Germany
fYear
1991
fDate
2-9 Nov. 1991
Firstpage
864
Abstract
A data acquisition module based on monolithic high-speed flash-ADC (analog-to-digital converter) chips (8-b resolution) is described. Four fully independent channels, with 250-MHz sampling rate and a 2-Kbyte buffer memory each, can be combined (interleaved) in one channel to achieve an effective 1-GHz sampling rate with a total of 8-Kbyte memory depth. The double Eurocard board supports standard 16-b VMEbus protocol for high-speed readout. The board is essentially self-contained and can be used cost-effectively in small applications as well as in large experimental setups.<>
Keywords
analogue-digital conversion; computerised instrumentation; data acquisition; nuclear instrumentation; physics computing; 1 GHz; VMEbus protocol; analog-to-digital converter; buffer memory; data acquisition module; double Eurocard board; flash-ADC module; high-speed readout; Clocks; Counting circuits; Data acquisition; Optical pulse shaping; Performance analysis; Physics; Pulse amplifiers; Sampling methods; Signal analysis; Transient analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Nuclear Science Symposium and Medical Imaging Conference, 1991., Conference Record of the 1991 IEEE
Conference_Location
Santa Fe, NM, USA
Print_ISBN
0-7803-0513-2
Type
conf
DOI
10.1109/NSSMIC.1991.258847
Filename
258847
Link To Document