• DocumentCode
    3455499
  • Title

    Supervised learning with organic memristor devices and prospects for neural crossbar arrays

  • Author

    Bennett, Christopher H. ; Chabi, Djaafar ; Cabaret, Theo ; Jousselme, Bruno ; Derycke, Vincent ; Querlioz, Damien ; Klein, Jacques-Olivier

  • Author_Institution
    Inst. d´Electron. Fondamentale, Univ. Paris-Sud, Orsay, France
  • fYear
    2015
  • fDate
    8-10 July 2015
  • Firstpage
    181
  • Lastpage
    186
  • Abstract
    The integration of memristive nanodevices within transistor-based electronic systems offers the potential for computing structures smaller, lower power and cheaper than traditional high-performance systems. Among emerging memristive technologies, a novel device based on organic materials distinguishes itself, in that it can feature several threshold voltages on the same die, and possesses unipolar behavior. In this work, we highlight that these two features can be beneficial for neural network-inspired learning systems. An on-chip supervised learning method for hybrid memristors / CMOS systems - an analogue synaptic array paired with a hybrid learning cell - is extended to the case of this novel organic memristor device. The organic device can be trained with only one pulse per row (two for the entire array) per presentation of input - as compared to four for a bipolar memristor array. The device also works universally- in both the synaptic grid as well as learning cell-paving the way to single die integration. The proposed scheme learns successfully, even while incorporating non-ideal circuit phenomena such as a wide range of parasitic wire resistances and associated sneak paths. These encouraging first results suggest that these multi-threshold, unipolar organic memristive devices are a useful species for inclusion in adaptive next generation electronic systems.
  • Keywords
    CMOS integrated circuits; learning (artificial intelligence); memristor circuits; neural chips; adaptive next generation electronic systems; analogue synaptic array; hybrid learning cell; hybrid memristors-CMOS system; memristive nanodevice; neural crossbar arrays; neural network inspired learning system; nonideal circuit phenomena; organic memristor device; parasitic wire resistance; single die integration; sneak paths; supervised learning; synaptic grid; transistor based electronic systems; Latches; Logic gates; Memristors; Nanoscale devices; Programming; Threshold voltage; Wires; memristor; nanoscale crossbar; neural network; on-chip learning; organic memristor; supervised learning;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanoscale Architectures (NANOARCH), 2015 IEEE/ACM International Symposium on
  • Conference_Location
    Boston, MA
  • Type

    conf

  • DOI
    10.1109/NANOARCH.2015.7180609
  • Filename
    7180609