Voltage and frequency island optimizations for many-core/networks-on-chip designs

Many-core chips interconnected by networks-on-chip (NoC) are increasingly challenged by the tight power consumption constraints. The concept of voltage and frequency island (VFI) which has been recently introduced for achieving fine-grain core-level power management fits well with an NoC design style. This paper will discuss some recent advancement of VFI optimizations for many-core/NoC designs. We will also discuss other research challenges for low-power many-core/NoC designs from an electronic system level (ESL) perspective.