Design of variable fractional delay filter using interlaced sampling scheme

In this paper, the design of variable fractional delay filter using interlaced sampling method is presented. First, the conventional design based on Shannon sampling method is reviewed briefly. This method has an irreducible error in high frequency region. To reduce this unwanted error, the design method based on interlaced sampling scheme is then proposed. The weighted least squares (WLS) approach is used to obtain the optimal filter coefficients by minimizing the errors between ideal and actual responses. Finally, numerical examples are demonstrated to show that the proposed method has smaller design error than conventional method using Shannon sampling scheme.