A segmented gate driver with adjustable driving capability for efficiency optimization

This paper addresses the effect of the gate driving capability on the efficiency of synchronous buck converters. To reduce the switching loss in DC-DC converters, the gate drivers are often designed to turn the power MOSFETs on/off as quickly as possible. However, for fast turn on/off, gate drivers with high driving capability and consequently high power consumption are required. Since the gate driver power consumption is independent of the load, the gate driver power consumption at light load could become a large portion of the total power loss. In this paper, a segmented gate driver with adjustable driving capability is proposed. This allows the optimization of the power conversion efficiency as a function of the loading condition. The results of this work shows an improvement in efficiency of up to 7% under light load condition with a significant reduction in ringing and overshoot at the switching node and at the gate terminals of output stage transistors.