Title :
Hardware-software analysis of pole model features
Author :
Asefi, Hamid ; Ghoraani, Behnaz ; Ye, Andy ; Krishnan, Sridhar
Author_Institution :
Dept. of Electr. & Comput. Eng., Ryerson Univ., Toronto, ON, Canada
Abstract :
In real time applications or portable devices, software implementation is not enough by itself to evaluate a signal feature analysis technique and a hardware implementation needs to be considered. The selection of the right signal feature analysis technique for an application depends on the algorithmic (software) performance, and also on the hardware efficiency of that technique. However, there are not enough studies exist in the evaluation of the pole modeling feature analysis technique from the hardware/software implementation aspects. The objective of this paper is to investigate both the hardware and software perspectives of pole modeling as a promising signal feature analysis method. The computational complexity is analyzed in detail and an estimation for the FPGA area usage is proposed for pole modeling. This pa per also investigates the software performance of pole modeling by performing an audio classification in MATLAB.
Keywords :
audio signal processing; computational complexity; field programmable gate arrays; hardware-software codesign; mathematics computing; signal classification; FPGA area usage; MATLAB; algorithmic performance; audio classification; computational complexity; hardware-software analysis; hardware-software implementation aspects; pole modeling feature analysis; portable devices; signal feature analysis technique; Analytical models; Computational modeling; Feature extraction; Hardware; Humans; Mathematical model; Software; Audio classification; Hardware area usage; Hardware vs. software performance; Pole modeling;
Conference_Titel :
Electrical and Computer Engineering (CCECE), 2011 24th Canadian Conference on
Conference_Location :
Niagara Falls, ON
Print_ISBN :
978-1-4244-9788-1
Electronic_ISBN :
0840-7789
DOI :
10.1109/CCECE.2011.6030671