• DocumentCode
    345781
  • Title

    Digital pulse logic-a new paradigm for the hardware realization of combinational and sequential digital logic

  • Author

    Chaudhary, Amit ; Jayadeva ; Roy, S. C Dutta

  • Author_Institution
    Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
  • Volume
    1
  • fYear
    1998
  • fDate
    1998
  • Firstpage
    124
  • Abstract
    We describe a pulse stream neural network approach for realising combinational and sequential logical functions, referred to as digital pulse logic. The elemental unit or neuron is based on a modified phase locked loop, which we use to design digital gates and sequential blocks. Such implementations offer very wide noise margins and are thus more robust in comparison with conventional implementations. We discuss both open loop and closed loop implementations
  • Keywords
    combinational circuits; digital phase locked loops; integrated logic circuits; logic design; logic gates; neural chips; sequential circuits; closed loop implementation; combinational digital logic; combinational logical functions; digital gates; digital pulse logic; elemental unit; hardware realization; modified phase locked loop; neuron; noise margin; open loop implementation; pulse stream neural network; sequential blocks; sequential digital logic; sequential logical functions; Biological neural networks; Biological system modeling; Biomembranes; Frequency; Hardware; Logic; Neurons; Neurotransmitters; Pulse modulation; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    TENCON '98. 1998 IEEE Region 10 International Conference on Global Connectivity in Energy, Computer, Communication and Control
  • Conference_Location
    New Delhi
  • Print_ISBN
    0-7803-4886-9
  • Type

    conf

  • DOI
    10.1109/TENCON.1998.797094
  • Filename
    797094