DocumentCode
3457965
Title
Optimization of circuitry for power and area efficiency by using combination between latch and register
Author
Hassan, Nik Azman Nik ; Abd Manaf, Asrulnizam Bin ; Ming, Leong Chan
Author_Institution
Sch. of Electr. & Electron. Eng., Univ. Sains Malaysia, Nibong Tebal, Malaysia
fYear
2011
fDate
4-7 Dec. 2011
Firstpage
240
Lastpage
244
Abstract
The benefits of level sensitive latch-based circuit have been known for some time. Latches offer improvement in power, area and even speed compared to flip-flops. Therefore this paper describes flip-flops replacement by latches to improve power and area of a circuit. Here the straightforward replacement method is used where a flip-flop is replaced by a latch without changing the functionality of the circuit. The method was implemented in Netlist using the core processor by Opencores, OpenRisc 1200 Hyper Pipelined (ORisc1200), as the test case. Experimental result proves reduction in power consumption as well as circuit area has been achieved.
Keywords
circuit optimisation; flip-flops; microprocessor chips; Netlist; area efficiency; circuitry; core processor; flip-flops; level sensitive latch-based circuit; optimization; power efficiency; Clocks; Delay; Flip-flops; Latches; Optimization; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Applications and Industrial Electronics (ICCAIE), 2011 IEEE International Conference on
Conference_Location
Penang
Print_ISBN
978-1-4577-2058-1
Type
conf
DOI
10.1109/ICCAIE.2011.6162138
Filename
6162138
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