Properties of CMOS devices and circuits fabricated on high-resistivity, detector-grade silicon

Author

Holland, S.

Author_Institution

Lawrence Berkeley Lab., California Univ., CA, USA

fYear

1991

fDate

2-9 Nov. 1991

Firstpage

597

Abstract

A CMOS process that is compatible with silicon p-i-n radiation detectors has been developed and characterized. Twelve mask layers are used in the process. The NMOS device is formed in a retrograde well while the PMOS device is fabricated directly in the high-resistivity silicon. Isolation characteristics are similar to a standard boundary CMOS process. Circuit performance using 3- mu m design rules has been evaluated. The measured propagation delay and power-delay product for a 51-stage ring oscillator were 1.5 ns and 43 fJ, respectively. Measurements on a simple cascade amplifier show a gain-bandwidth product of 200 MHz at a bias current of 15 mu A. The input-referred noise of the cascade amplifier is 20 nV/ square root Hz at 1 MHz.<>

Keywords

CMOS integrated circuits; nuclear electronics; semiconductor counters; silicon; 1 MHz; 1.5 ns; 15 muA; 200 MHz; 51-stage ring oscillator; CMOS devices; CMOS process; NMOS device; PMOS device; Si; bias current; circuit performance; design rules; detector-grade; gain-bandwidth product; high-resistivity; input-referred noise; mask layers; p-i-n radiation detectors; power-delay product; propagation delay; retrograde well; simple cascade amplifier; standard boundary; CMOS process; Circuit optimization; Current measurement; Gain measurement; MOS devices; PIN photodiodes; Propagation delay; Radiation detectors; Ring oscillators; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium and Medical Imaging Conference, 1991., Conference Record of the 1991 IEEE

Conference_Location

Santa Fe, NM, USA

Print_ISBN

0-7803-0513-2

Type

conf

DOI

10.1109/NSSMIC.1991.259007

Filename

259007