Performance of flash ADCs in the 100 MHz range. II. Results from 8 bit devices

Author

Crawley, H.B. ; McKay, R. ; Meyer, W.T. ; Rosenberg, E.I. ; Thomas, W.D.

Author_Institution

Iowa State Univ., Ames, IA, USA

fYear

1991

fDate

2-9 Nov. 1991

Firstpage

681

Abstract

For pt.I see ibid., vol.38, p.102 (1991). Tests on 8-b flash ADCs (analog-to-digital converters) from Sony and Analog Devices have been performed by the authors using a benchmark previously described by them. For each device, the authors have measured parameters such as linearity, number of effective bits, noise level, aperture jitter, integral and differential nonlinearity, analog bandwidth, and total harmonic distortion. The goal of these tests is to find cost-effective solutions to data acquisition problems in Superconducting Super Collider (SSC) and Large Hadron Collider (LHC) experiments.<>

Keywords

analogue-digital conversion; data acquisition; nuclear electronics; synchrotrons; 100 MHz; 8 bit devices; Analog Devices; LHC; Large Hadron Collider; SSC; Sony; Superconducting Super Collider; analog bandwidth; analog-to-digital converters; aperture jitter; benchmark; cost-effective solutions; data acquisition; differential nonlinearity; effective bits; flash ADCs; integral; linearity; noise level; total harmonic distortion; Analog-digital conversion; Apertures; Benchmark testing; Distortion measurement; Jitter; Large Hadron Collider; Linearity; Noise level; Noise measurement; Performance evaluation;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium and Medical Imaging Conference, 1991., Conference Record of the 1991 IEEE

Conference_Location

Santa Fe, NM, USA

Print_ISBN

0-7803-0513-2

Type

conf

DOI

10.1109/NSSMIC.1991.259025

Filename

259025