Title :
Integration for reduction of sub-half-micron center yield fallout
Author :
Au, Wing kei ; Sappidi, Jayaprakash ; Parks, Delbert ; Delgado, Miguel ; Kulkami, Manda ; Costabile, Mike ; Li, Jane ; Gabriel, Calvin T. ; Wong, Vincent ; Levan, Mark
Author_Institution :
VLSI Technol Inc., San Antonio, TX, USA
Abstract :
This paper identifies and evaluates a new failure mechanism that preferentially suppresses the yield in the center of the wafer for deep submicron technologies. The problem is studied with sort analysis, bitmapping and in-line defect monitoring with production lots and short-looped monitor wafers. The center yield depression is identified to be a strong function of chamber hardware [upper ceramic shaped transformer coupled plasma (TCP) window] in the metal etcher. Surface morphology comparison between an as-fired ceramic TCP window and a standard as-grounded ceramic TCP window indicates loosely bonded particles that could fall loose due to sputtering during the metal etch process. The loosely bonded particles can cause blocked metal etch resulting in metal islands shorting the metal lines. The metal islands range in sizes from 0.3 to 1 μm, making them yield killers as design geometries get smaller. Comparison of the as-fired and as-grounded ceramic TCP window indicates the lifetime of the ceramic windows is a strong factor on the extent of blocked metal etch. By adjusting the metal etch chemistry to a less sputtering regime and the addition of polymer forming gases, the impact of the ceramic window on blocked metal etch is minimized with subsequent improvement in the yield in the center of the wafer. Details are given of the effect of the machine hardware on the defect performance, comparison of the old and new metal etch chemistries, as well as the final yield improvement result
Keywords :
failure analysis; inspection; integrated circuit yield; monitoring; sputter etching; IC manufacture; as-fired ceramic TCP window; as-grounded ceramic TCP window; bitmapping; blocked metal etch; center yield depression; ceramic window lifetime; chamber hardware; deep submicron technologies; defect performance; failure mechanism; inline defect monitoring; loosely bonded particles; metal etch chemistry adjustment; metal etch process; metal etcher; metal islands; metal line shorting; polymer forming gases; production lots; short-looped monitor wafers; sort analysis; sputtering; sub-half-micron center yield fallout; surface morphology comparison; transformer coupled plasma window; yield improvement; Ceramics; Chemistry; Condition monitoring; Failure analysis; Hardware; Plasma applications; Production; Sputter etching; Sputtering; Surface morphology;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference and Workshop, 1999 IEEE/SEMI
Conference_Location :
Boston, MA
Print_ISBN :
0-7803-5217-3
DOI :
10.1109/ASMC.1999.798173