Statistical runtime verification of analog and mixed signal designs

One of the challenges for the verification of analog and mixed signal (AMS) designs is the stochastic behavior associated. In this paper, we propose a runtime verification approach to verify the statistical property of the AMS design. The methodology is based on the combination of the statistical method and Mont Carlo simulation. The verification procedure produces confidence level and error margin that provide the tolerance and accuracy for the verification results. We apply the proposed methodology to study the jitter property of a PLL design.