DocumentCode :
3461567
Title :
Noise analysis of ESD structures and impacts on a fully-integrated 5.5GHz LNA in 0.18μm SiGe BiCMOS
Author :
Chen, Guang ; Feng, Haigang ; Wang, Albert ; Cheng, Yuhua
Author_Institution :
Dept of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA
Volume :
3
fYear :
2005
fDate :
4-6 Oct. 2005
Abstract :
ESD-induced parasitics are critical to RF ICs. This paper reports the first quantitative study of noises of ESD protection structures and their influences on RF ICs. Noise figures (NF) of typical ESD structures were characterized and their impact on a single-chip 5.5GHz LNA circuit was investigated. The design was implemented in a 0.18μm SiGe BiCMOS. Measurement shows substantial degradation in NF of LNA due to ESD noises and a practical selection criterion in designing RF IC with ESD structures is provided.
Keywords :
BiCMOS analogue integrated circuits; Ge-Si alloys; MMIC amplifiers; electrostatic discharge; integrated circuit noise; low noise amplifiers; 0.18 micron; 5.5 GHz; BiCMOS technology; ESD protection structure noise; ESD structures; ESD-induced parasitics; LNA circuit; RF integrated circuits; SiGe; noise analysis; noise figure; BiCMOS integrated circuits; Circuit noise; Electrostatic discharge; Germanium silicon alloys; Integrated circuit noise; Noise figure; Noise measurement; Protection; Radio frequency; Silicon germanium;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference, 2005 European
Print_ISBN :
2-9600551-2-8
Type :
conf
DOI :
10.1109/EUMC.2005.1610290
Filename :
1610290
Link To Document :
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