• DocumentCode
    3461577
  • Title

    A 5.7-GHz low-power and high-gain 0.18-μm CMOS double-balanced mixer for WLAN

  • Author

    Liao, C.-H. ; Chu, Y.-K. ; Huang, D.-R. ; Chuang, H.-R.

  • Author_Institution
    Dept. of Electr. Eng., National Cheng Kung Univ., Tainan, Taiwan
  • Volume
    3
  • fYear
    2005
  • fDate
    4-6 Oct. 2005
  • Abstract
    This paper presents a low-power and high-gain 5.7 GHz CMOS double-balanced mixer for an IEEE 802.11a WLAN application. The RF input frequency of the mixer is 5.725∼25GHz, LO is 5.265∼5.325GHz, IF is at 480MHz. The mixer is fabricated with the 0.18 μm 1P6M standard CMOS process. The die size is 0.627 × 0.649 mm2. The measurements are performed using an FR-4 PCB test fixture. The fabricated mixer exhibits a conversion gain of 11 dB, noise figure of 12.8dB, and input P1dB -16.4dBm. The DC consumption current is 2.0 mA/1.0 mA for the core/buffer amplifier at VDD = 1.8 V.
  • Keywords
    CMOS analogue integrated circuits; MMIC mixers; low-power electronics; wireless LAN; 0.18 micron; 11 dB; 12.8 dB; 1P6M standard CMOS process; 2 mA; 480 MHz; 5.7 GHz; DC consumption current; FR-4 PCB test fixture; IEEE 802.11a; RF input frequency; WLAN; core-buffer amplifier; double-balanced mixer; high-gain CMOS; low-power CMOS; Baseband; CMOS process; Circuits; Costs; Linearity; Mixers; Noise figure; Radio frequency; Switches; Wireless LAN;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microwave Conference, 2005 European
  • Print_ISBN
    2-9600551-2-8
  • Type

    conf

  • DOI
    10.1109/EUMC.2005.1610291
  • Filename
    1610291
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3461577