DocumentCode
3462633
Title
Implementation of SoC-PC Communication Interface Based on USB2.0
Author
Han Jun Tao ; Guan Yong ; Dai Zhiquan
Author_Institution
Inf. Eng. Coll., Capital Normal Univ., Beijing, China
fYear
2009
fDate
June 30 2009-July 2 2009
Firstpage
831
Lastpage
834
Abstract
USB is more used than some traditional inter-PC Bus such as PCI and ISA due to the high speed and agility and also provides properly convenient communication interface for some A/D conversion, FPGA of the external logic device. This passage uses the asynchronies work mode of slave FIFO and adopts HDL to compose state machine for FPGA to produce some control signals which implements data acquisition for the solution of high speed and reliability communication between SoC and PC. The results of the final experiment show that this scheme is very fast and efficient for the data acquisition and it can also apply other cases such as video acquisition for the embedded system through USB.
Keywords
data acquisition; data communication; field programmable gate arrays; finite state machines; microcomputers; peripheral interfaces; system-on-chip; A/D conversion; FPGA; HDL adaption; SoC-PC communication interface implementation; USB2.0 bus; asynchronies work mode; control signal production; data acquisition; embedded system; external logic device; high speed communication; reliable communication; slave FIFO; video acquisition; Communication standards; Control systems; Data acquisition; Educational institutions; Embedded system; Field programmable gate arrays; Microprogramming; Pins; Switches; Universal Serial Bus; Data Acquisition; FPGA; Firmware; USB2.0;
fLanguage
English
Publisher
ieee
Conference_Titel
New Trends in Information and Service Science, 2009. NISS '09. International Conference on
Conference_Location
Beijing
Print_ISBN
978-0-7695-3687-3
Type
conf
DOI
10.1109/NISS.2009.53
Filename
5260828
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