DocumentCode
3462647
Title
Strained-si and advanced channel materials on insulator: challenges and opportunities
Author
Cheng, Zhi-Yuan
Author_Institution
AmberWave Syst. Corp., Salem, NH
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
90
Lastpage
95
Abstract
Integration of advanced high transport channel materials into Si-based CMOS devices holds great promises for CMOS scaling beyond Moore\´s Law. In this article, various heteroepitaxy approaches and structures for advanced channel material fabrication in "on-insulator" structures was discuss, including both global and localized epitaxy techniques with strained-Si, Ge, III-V etc. The limits, challenges and potential opportunities are addressed
Keywords
epitaxial growth; semiconductor materials; silicon-on-insulator; CMOS devices; channel materials on insulator; heteroepitaxy approaches; high transport channel materials; on-insulator structures; strained-silicon-on-insulator; CMOS process; CMOS technology; Capacitive sensors; Epitaxial growth; Germanium silicon alloys; III-V semiconductor materials; Insulation; Moore´s Law; Silicon germanium; Uniaxial strain;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306086
Filename
4098030
Link To Document