DocumentCode :
3462658
Title :
A 65nm 2-Billion-Transistor Quad-Core Itanium® Processor
Author :
Stackhouse, Blaine ; Cherkauer, Brian ; Gowan, Mike ; Gronowski, Paul ; Lyles, Chris
Author_Institution :
Intel, Hudson, MD
fYear :
2008
fDate :
3-7 Feb. 2008
Firstpage :
92
Lastpage :
598
Abstract :
The next generation in the Itanium processor family is introduced. The processor has 4 dual-threaded cores integrated on die with a system interface and 30MB of cache in an 8M 65nm process. The 21.5times32.5mm2 die contains 2.05 billion transistors. The silicon is designed to operate the cores up to 2.0GHz and the system interface at 2.4GHz, with a thermal design power (TDP) of 170W at 110degC.
Keywords :
integrated circuit interconnections; microprocessor chips; Itanium processor family; QuickPath interconnects; dual-threaded cores; frequency 2.0 GHz; frequency 2.4 GHz; power 170 W; size 65 nm; system interfaces; temperature 110 degC; thermal design power; Bandwidth; Clocks; Control systems; Frequency synchronization; Integrated circuit interconnections; Microprocessors; Power system interconnection; Protection; Registers; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-2010-0
Electronic_ISBN :
978-1-4244-2011-7
Type :
conf
DOI :
10.1109/ISSCC.2008.4523072
Filename :
4523072
Link To Document :
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