Development of strained Si-SiGe-on-insulator wafers for high speed ULSI

Author

Nakashima, Hiroshi ; Miyao, Masanobu ; Nakamae, Masahiko ; Asano, Tanemasa

Author_Institution

KASTEC, Kyushu Univ., Kasuga

fYear

2006

fDate

Oct. 2006

Firstpage

100

Lastpage

103

Abstract

Strain relaxation process of SiGe-on-insulator (SGOI) structures in the oxidation induced Ge condensation method was investigated as a function of SiGe thickness. Complete relaxation was obtained for SiGe layer having the thickness of more than 60 nm, leading to the establishment of highly relaxed SGOI wafer fabrication. The photoluminescence evaluation of the strained Si/SGOI wafers showed high Ge fraction degrades crystallinity of St-Si/SGOI wafer, and high Ge condensation temperature is beneficial to the crystallinity enhancement. CMOS inverters and ring oscillators were fabricated to evaluate the impact of strained-Si/SGOI on the device performance. The signal propagation speed of the CMOS on the St-Si/SGOI wafer was twice as high as that of the Si-on-insulator CMOS

Keywords

CMOS integrated circuits; Ge-Si alloys; ULSI; crystallisation; oscillators; photoluminescence; semiconductor technology; silicon; silicon-on-insulator; wafer-scale integration; CMOS inverters; SGOI structures; SGOI wafer fabrication; Si-SiGe; SiGe-on-insulator; ULSI; condensation temperature; crystallinity degradation; photoluminescence evaluation; ring oscillators; strain relaxation process; strained Si-SiGe-on-insulator; Capacitive sensors; Crystallization; Degradation; Fabrication; Germanium silicon alloys; Oxidation; Photoluminescence; Silicon germanium; Temperature; Ultra large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on

Conference_Location

Shanghai

Print_ISBN

1-4244-0160-7

Electronic_ISBN

1-4244-0161-5

Type

conf

DOI

10.1109/ICSICT.2006.306088

Filename

4098032