DocumentCode
346283
Title
Efficient switching activity computation during high-level synthesis of control-dominated designs
Author
Bogliolo, A. ; Benini, L. ; Riccó, B. ; De Micheli, G.
Author_Institution
Dipt. di Elettronica Inf. e Sistemistica, Bologna Univ., Italy
fYear
1999
fDate
17-17 Aug. 1999
Firstpage
127
Lastpage
132
Abstract
In this work we propose an exact technique for efficient computation of signal statistics during high-level synthesis for low-power of general control-dominated designs. Our approach does not require iterative simulation: simulation is performed once for all to collect boundary information that will be repeatedly exploited for computing signal statistics for alternative implementations.
Keywords
circuit optimisation; high level synthesis; logic simulation; low-power electronics; switching theory; CDFG simulation; RTL power estimation; boundary information; control-dominated designs; high-level synthesis; input-output statistics; low-power design; signal statistics; simulation; switching activity computation; Circuits; Computational modeling; Data structures; Flow graphs; High level synthesis; Performance evaluation; Power generation; Processor scheduling; Signal design; Statistics;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design, 1999. Proceedings. 1999 International Symposium on
Conference_Location
San Diego, CA, USA
Print_ISBN
1-58113-133-X
Type
conf
Filename
799427
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