Design of a 3rd order micro power switched current ΣΔ-modulator

Author

Jorgensen, Ivan H H ; Bogason, Gudmundur

Author_Institution

Dept. of Inf. Technol., Tech. Univ., Lyngby, Denmark

Volume

2

fYear

1996

fDate

13-16 Oct 1996

Firstpage

948

Abstract

This paper reports the design of a 3rd order switched current-ΣΔ-modulator. The modulator is design to have a SNR of 80 dB with a signal bandwidth of f_b=6 kHz. The oversampling ratio is R=90 and the sampling frequency f_s=1.08 MHz. Multiple input signals are used to reduce the internal signal swings, which results in reduced power consumption. The noise from the 2nd and 3rd integrator is shaped. This is used to allow the noise power from these integrators to be increased and hence saving power. The power consumption of the first integrator is 254 μW and the total power consumption is 600 μW. The supply voltage is V_DD=2.7 V. A new methology is presented that allows for optimization of SI circuits for minimum power consumption with respect to process tolerances

Keywords

sigma-delta modulation; switched current circuits; 1.08 MHz; 2.7 V; 6 MHz; 600 muW; SI circuit optimization; SNR; design; noise shaping; oversampling ratio; power consumption; sampling frequency; signal bandwidth; supply voltage; third order micropower switched current ΣΔ-modulator; Circuit noise; Cutoff frequency; Energy consumption; Filters; Low-frequency noise; Multi-stage noise shaping; Noise shaping; Quantization; Sampling methods; Transfer functions;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits, and Systems, 1996. ICECS '96., Proceedings of the Third IEEE International Conference on

Conference_Location

Rodos

Print_ISBN

0-7803-3650-X

Type

conf

DOI

10.1109/ICECS.1996.584542

Filename

584542