Integration of a SiP for GSM/EDGE in CMOS Technology

Author

Puma, Giuseppe Li ; Kristan, Ernst ; De Nicola, Paolo ; Vannier, Cyril ; Greyling, Braam ; Piccolella, Salvatore

Author_Institution

Infineon Technol., Duisburg

fYear

2008

fDate

3-7 Feb. 2008

Firstpage

210

Lastpage

608

Abstract

In this paper, a system-in-package (SiP) integration solution for GSM/EDGE consisting of two monolithic integrated dies is presented. The first die includes the BB and RF transceiver blocks and is fabricated in a standard 6M 0.13 mum CMOS technology with MIM capacitors. The second die includes the PMU and an audio power amplifier and is implemented in a 0.25 mum CMOS technology. Both dies are flip-chipped side-by-side into a 10x10 mm² very thin BGA-293 package with a dual metal layer substrate for routing.

Keywords

3G mobile communication; CMOS integrated circuits; ball grid arrays; cellular radio; flip-chip devices; system-in-package; BGA-293 package; CMOS technology; GSM-EDGE; MIM capacitor; SiP; flip-chip package; monolithic integrated die; size 0.13 mum; size 0.25 mum; system-in-package; CMOS technology; GSM; MIM capacitors; Packaging; Phasor measurement units; Power amplifiers; Radio frequency; Radiofrequency amplifiers; Routing; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International

Conference_Location

San Francisco, CA

Print_ISBN

978-1-4244-2010-0

Electronic_ISBN

978-1-4244-2011-7

Type

conf

DOI

10.1109/ISSCC.2008.4523131

Filename

4523131