DocumentCode
3464010
Title
High-k/metal gate stack technology for advanced CMOS
Author
Nara, Yasuo ; Ootsuka, Fumio ; Inumiya, Seiji ; Ohji, Yuzuru
Author_Institution
Semicond. Leading Edge Technol., Inc., Tsukuba
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
360
Lastpage
363
Abstract
In order to obtain high performance CMOS devices with scaled dimensions, introduction of new technologies into the front-end fabrication process are required and therefore technologies such as strained channel, metal gate, high-k gate dielectrics, thin body SOI, and multi-gate transistor, are proposed so far. Among these technologies, gate stack technology is common key issue for scaled CMOS devices. In this presentation, gate stack technology using high-k gate dielectrics and metal gate will be discussed, and recent achievements of these technologies will be reviewed
Keywords
CMOS integrated circuits; MOSFET; dielectric materials; silicon-on-insulator; CMOS devices; gate stack technology; high-k gate dielectrics; multi-gate transistor; silicon-on-insulator; Boron; CMOS process; CMOS technology; Dielectric materials; Fabrication; High K dielectric materials; High-K gate dielectrics; MOS devices; MOSFETs; Nitrogen;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306252
Filename
4098109
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