• DocumentCode
    3464098
  • Title

    Modifying min-cut for hardware and software functional partitioning

  • Author

    Vahid, Frank

  • Author_Institution
    Dept. of Comput. Sci., California Univ., Riverside, CA, USA
  • fYear
    1997
  • fDate
    24-26 Mar 1997
  • Firstpage
    43
  • Lastpage
    48
  • Abstract
    The Kernighan/Lin heuristic, also known as min-cut, has been extended very successfully for circuit partitioning over several decades. Those extensions customized the heuristic and its associated data structure to rapidly compute the minimum-cut metric required during circuit partitioning thus, those extensions are not applicable to problems requiring other metrics. The author extends the heuristic for functional partitioning in a manner applicable to the codesign problem of hardware/software partitioning as well as to hardware/hardware partitioning. The extension customizes the heuristic and data structure to rapidly compute execution-time and communication metrics, crucial to hardware and software partitioning, and leads to near-linear time-complexity and excellent results. The experiments demonstrate extremely fast execution times (just a few seconds) with results matched only by the much slower simulated annealing heuristic, meaning that the extended Kernighan/Lin heuristic will likely prove hard to beat for hardware and software functional partitioning
  • Keywords
    computational complexity; computer architecture; data structures; high level synthesis; program compilers; software metrics; circuit partitioning; codesign problem; communication metrics; data structure; execution time metrics; extended Kernighan/Lin heuristic; fast execution times; hardware functional partitioning; hardware/hardware partitioning; hardware/software partitioning; minimum-cut metric; modified min-cut; near-linear time complexity; software functional partitioning; Assembly; Circuits; Computational modeling; Computer science; Data structures; Embedded software; Embedded system; Hardware; High level synthesis; Simulated annealing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Hardware/Software Codesign, 1997. (CODES/CASHE '97), Proceedings of the Fifth International Workshop on
  • Conference_Location
    Braunschweig
  • ISSN
    1092-6100
  • Print_ISBN
    0-8186-7895-X
  • Type

    conf

  • DOI
    10.1109/HSC.1997.584577
  • Filename
    584577